1. Field of the Invention
The present invention relates to a solid-state image pickup device widely used in image pickup apparatuses such as a video camera and digital still camera.
2. Related Background Art
In recent years, the pixel size has enthusiastically been reduced using a miniaturization process for the purpose of high resolution. Since this decreases the photoelectrically converted signal output, amplifier type solid-state image pickup devices capable of amplifying and outputting a photoelectrically converted signal are receiving a great deal of attention. Such amplifier type solid-state image pickup device includes a MOS, AMI, CMD, and BASIS type device. Of these devices, the MOS type solid-state image pickup device accumulates photocarriers generated by a photodiode in the gate electrode of a MOS transistor, and amplifies the electric charges to output the potential change to an output unit in accordance with a driving timing from a scanning circuit. Of the MOS type solid-state image pickup devices, attention recently has been given particularly to a CMOS solid-state image pickup device in which all the components including a photoelectric conversion unit and peripheral circuit are implemented by a CMOS process.
FIG. 1 is a block diagram showing the arrangement of a conventional CMOS solid-state image pickup device. In FIG. 1, the CMOS solid-state image pickup device comprises a pixel portion 1, and a vertical scanning circuit unit 2 for vertically scanning pixels. The pixel portion 1 is constituted by photodiodes D11 to D33, reset MOS transistors (to be referred to as MOSs) M211 to M233 for resetting electric charges in the photodiodes, amplifier MOSs M311 to M333 for amplifying electric charges in the photodiodes, selector MOSs M411 to M433 for selecting rows, and vertical output lines V1 to V3. Load MOSs M51 to M53 serve as the loads of the amplifier MOSs, an input MOS M50 sets a constant current to be supplied to the load MOSs, and a voltage input terminal 5 sets the gate voltage of the input MOS.
The operation of the solid-state image pickup device in FIG. 1 will be described. When light is incident on the photodiodes D11 to D33, the respective photodiodes generate and accumulate photo-signal charges. In reading out signals, they are sequentially read out to the vertical output lines V1 to V3 in units of rows while the vertical scanning circuit unit 2 vertically scans the pixels. If the first row is selected, a signal on a second row selection line PSEL1 connected to the gates of the selector MOSs M411, M421, and M431 changes to high level, and the amplifier MOSs M311, M321, and M331 are activated. As a result, signals on the first row are read out to the vertical output lines V1 to V3. Then, a signal on a first row selection line PRES1 connected to the gates of the reset MOSs M211, M221, and M231 changes to high level, and the electric charges accumulated in the photodiodes D11, D21, and D31 are reset. The second row is selected, and signals on the second row are similarly read out to the vertical output lines V1 to V3. Similarly, signals on the third and subsequent lines are sequentially read out to the vertical output lines V1 to V3.
In a read-out operation in the solid-state image pickup device of FIG. 1, as a photo-signal is higher, the voltages on the vertical output lines V1 to V3 are lower. The vertical output lines V1 to V3 are respectively connected to the drains of the load MOSs M51 to M53. On a column from which the signal of a pixel receiving very strong light is read out, the source-drain voltage of a load MOS drops to 0 V to turn it off. Hence, a current which flows through a common GND line 4 in reading out a given row changes depending on the number of load MOSs which are in an off-state (referred to hereinafter as “OFF load MOSs”). The line width of the GND line 4 can take only a finite value in terms of limitations on the chip size or the like, and has a certain impedance.
The value of a constant current which is supplied to the load MOS is set to apply the voltage of the input terminal 5 between the gate of the input MOS M50 and an absolute GND (e.g., ground potential of an external substrate). For this reason, the set current value changes owing to a voltage drop determined by the impedance of the GND line 4 and the current flowing therethrough. Since the number of OFF load MOSs is larger as the number of pixels receiving strong light is larger, the voltage drop across the GND line 4 decreases to increase the set current of the load MOS, resulting in a large gate-source voltage of the amplifier MOS. Due to this phenomenon, the output voltages of dark pixels and optical black (OB) pixels are different between a row including a pixel receiving strong light and another row. An image receiving a strong light spot suffers whitish bands on the right and left of the spot.